1. Field of the Invention
The present invention relates to a signal processor having an A/D conversion unit and an operation part, and an image capture apparatus using the same.
2. Description of the Related Art
In a digital camera, a video camera or the like, a CCD or CMOS image sensor is typically used as an image pickup element.
In an image capture apparatus using the image pickup element as described above, a large amount of complex computation is required to calculate an average value of an output within a predetermined area of a captured image or to calculate a projection image in a horizontal or vertical direction of a captured image.
Examples of such a computation include dark correction and dark shading correction. For example, in the dark correction, an average value of an optical black portion (herein referred to as an OB portion) that is a black reference for an image pickup element is calculated, and the average value is subtracted from an effective image output. The dark shading correction is a correction in which a dark image is photographed with an image pickup element shielded from light, a mapping operation is performed on the image in the horizontal direction and in the vertical direction, an average value for each column in the vertical direction and each row in the horizontal direction is calculated, and the average values are subtracted from effective image output.
Conventionally, to implement such a function, dedicated hardware is provided, or firmware of a control CPU repeats time-consuming operations.
Particularly, in an image capture apparatus using a CMOS image sensor having a plurality of readout channels, an average value for each channel is calculated. Additionally, a mapping operation for each channel leads to a very large burden on the system, since it is achieved only by operations using large hardware which can process a plurality of channels individually or firmware which requires processing time for repeating a process for each channel.
An A/D converter circuit is described in Japanese Patent Application Laid-Open No. H06-085668. The A/D converter circuit includes a memory circuit which temporarily stores a plurality of A/D converted values, and an arithmetic circuit into which the plurality of A/D converted values read out from the memory circuit are inputted and which performs predetermined arithmetic processing on the values and outputs the processed values as A/D converted values corresponding to an analog input voltage.
However, in the case of an image capture apparatus using a CMOS image sensor having a plurality of readout channels, the number of readout channels of the CMOS image sensor depends on a product. Therefore, a product which requires high-speed readout needs to be provided with much more readout channels. On the contrary, a product which requires only low-speed readout needs to have just a single readout channel. The difference between them results in a big difference also in cost. On the other hand, when a processing circuit supporting a plurality of channels is implemented in an image processing IC which processes them, the processing circuit naturally needs to support a maximum number of the channels, and providing such an image processing IC to a product having a single readout channel has a significant cost disadvantage. Of course, it is also not realistic to provide an image processing IC for a different hardware configuration for each product.
When such a processing is fully performed by firmware, a series of processes, in which only data whose memory address corresponds to each channel is sequentially accessed in a memory into which image data has been loaded and then addition and storage are performed, is repeated, and therefore the memory access time has a considerable influence on the processing time of the system. In addition, there is a problem that a great amount of time is required when a processing area is large.
Particularly, in a product having a CMOS image sensor with a plurality of readout channels, it is required that only a specific channel data is extracted from a memory into which image data has been loaded and arithmetic processing is performed on the extracted data. For this reason, memory access time is required. Therefore, particularly in a product having a CMOS image sensor with a plurality of readout channels which needs high-speed processing, there is a significant problem in reducing its processing time.